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From AC Socket to Silicon: End-to-End Circuit Analysis of 65 W Modern Laptop Power Systems — A Comparative Study of HP, Dell and Lenovo Architectures

1. Shiaondo Kenneth Chia
2. Gbaden Amenger

Volume 1, Issue 2 · Pioneer Volume · August 2026 · Part 2 · e052 · ISSN pending assignment

CHIATECH JOURNAL

SETEHEM · Volume 1, Issue 2 · Pioneer Volume · August 2026 · Part 2 · e052

PIONEER PUBLICATION · ACCEPTED ARTICLE · ORIGINAL RESEARCH ARTICLE · ELECTRICAL/ELECTRONIC ENGINEERING · POWER ELECTRONICS · COMPUTER HARDWARE

From AC Socket to Silicon: End-to-End Circuit Analysis of 65 W Modern Laptop Power Systems — A Comparative Study of HP, Dell and Lenovo Architectures

CHIA, Shiaondo Kenneth¹* · AMENGER, Gbaden²

¹ CHIA TECH Solutions and Resources Limited, Nigeria; Department of Electrical/Electronic Engineering, Federal University of Agriculture Makurdi, Nigeria

² Nigeria Customs Service, Ogun State Command, Nigeria; Department of Electrical/Electronic Engineering, Federal University of Agriculture Makurdi, Nigeria

*Corresponding author: chiakenneth01@gmail.com · ORCID: https://orcid.org/0009-0009-6434-4586

Abstract

Background: Modern laptops are powered by a cascade of converters extending from universal AC mains through an isolated adapter, USB-C Power Delivery (PD), protected motherboard power paths, battery charging, always-on rails and high-current point-of-load regulators. Public documentation usually describes these blocks separately, making end-to-end circuit interpretation difficult. Objective: To develop and validate a unified circuit-level model of the complete laptop power chain and compare three common 65 W-class business platforms: HP ProBook 440 G10, Dell Latitude 5540 and Lenovo ThinkPad E14 Gen 5. Methods: A comparative technical case-study was performed using official OEM adapter/battery specifications, USB-IF power-delivery requirements, and contemporary notebook reference designs from Texas Instruments. The authors derived the AC rectification, USB-PD power contract, input-path loss, NVDC buck-boost battery interface, CC-CV charging behavior, motherboard power-tree, multiphase CPU regulation and end-to-end loss equations. No proprietary motherboard schematic or undisclosed OEM measurement is claimed. Results: All three sample platforms converge on the 65 W class, with 20 V/3.25 A representing the dominant full-power USB-C operating point. At 230 V mains, the rectified peak is 325.3 V. A published 65 W GaN quasi-resonant adapter reference design reports 94.32% full-load efficiency at 230 V, implying about 68.9 W real input for 65 W DC output under that reference condition. The Dell sample documents an 11.4 V, 54 Wh three-cell battery, giving 4.74 Ah nominal energy capacity and an ideal 20 V-to-11.4 V buck duty ratio of about 0.57. The maximum listed batteries of the HP, Dell and Lenovo samples are 51, 54 and 57 Wh respectively. Conclusion: The modern laptop is best understood as a digitally negotiated, multi-stage power-conversion system rather than a single 19–20 V appliance. Reliable diagnosis and design require following energy, control and protection from the AC socket to the final sub-1.2 V silicon rails.

Keywords: laptop power system; USB-C Power Delivery; GaN charger; flyback converter; NVDC battery charger; buck-boost converter; multiphase VRM; motherboard power rails; HP; Dell; Lenovo

1. Introduction

A laptop power adapter is not simply a transformer that “steps 230 V down to 19 V.” Contemporary systems combine line-frequency protection, high-voltage rectification, a high-frequency isolated converter, digital USB-C negotiation, protected DC power entry, bidirectional battery energy management and multiple local regulators. Each stage exists because the electrical requirements change repeatedly: safety isolation is required at the wall boundary; communication is required at the USB-C interface; battery charging must respect electrochemical limits; and the processor demands a sub-1.2 V rail capable of large, rapidly changing current.

USB Power Delivery has also changed the service model. USB-IF defines USB PD as a negotiated power architecture over USB-C and notes that the current Extended Power Range can reach 240 W; the 65 W systems examined here remain in the Standard Power Range. Official specifications for HP, Dell and Lenovo 65 W adapters show the now-familiar 5/9/15/20 V family, with 20 V at approximately 3.25 A for the full 65 W operating point (USB-IF, 2026; HP, 2026a; Dell, 2026a; Lenovo, 2023a).

The research problem is fragmentation. OEM manuals publish adapter and battery specifications, semiconductor vendors publish reference power stages, and USB-IF publishes cable/PD requirements, but a technician, student or hardware researcher must still reconstruct how the stages interact. This paper therefore contributes a single end-to-end electrical model that follows energy from the AC socket to battery, system bus and silicon while explicitly separating OEM-published facts from representative industry topology.

Figure 1. End-to-end laptop power-conversion chain. Original authors’ synthesis from OEM specifications, USB-IF requirements and notebook-PC power reference designs.

2. Research Design, Cases and Evidence Boundary

The study used a comparative technical case-study design. Three 2023-generation business laptop families were selected because their public documentation clearly exposes 65 W charging, USB-C/PD capability and battery options: HP ProBook 440 G10, Dell Latitude 5540 and Lenovo ThinkPad E14 Gen 5. The unit of analysis was not a proprietary motherboard schematic; it was the public power interface plus a reference-design-supported internal topology representative of modern notebook hardware.

For the adapter interior, the study used published 65 W USB-PD reference designs rather than reverse-engineering an OEM brick. Texas Instruments documents both active-clamp/ZVS flyback and GaN quasi-resonant flyback implementations in this exact power class, including 20 V/3.25 A operation and measured full-load efficiencies above 93%. For the laptop-side charger, a 2026 TI notebook reference design uses a 2-to-5-cell NVDC quasi-dual-phase buck-boost charger accepting USB-C PD and traditional adapters with 98.2% peak efficiency (Texas Instruments, 2023, 2026a).

Accordingly, all brand-specific numbers in this paper are traceable to OEM sources. Internal component placement, switching frequency, MOSFET type and exact rail values are treated as representative unless an OEM source publishes them. This distinction prevents an analytical model from being misrepresented as a leaked or measured manufacturer schematic.

3. AC Socket to Isolated 20 V Adapter Output

3.1 Rectification and the high-voltage DC link

At a nominal 230 V RMS, 50 Hz mains input, the sinusoidal peak is obtained from the RMS-to-peak relationship

giving VPK = 325.3 V before allowance for bridge drops and line tolerance. A full-wave bridge rectifier folds the negative half-cycle positive, so the envelope presented to the bulk capacitor repeats at 2fline = 100 Hz. The adapter therefore begins with a safety/protection and EMI section, a rectifier, and a high-voltage DC link before the high-frequency isolated converter.

3.2 High-frequency flyback conversion

For 65 W notebook adapters, current reference designs commonly use quasi-resonant (QR), active-clamp flyback (ACF) or ZVS-assisted flyback topologies. These approaches raise switching frequency while controlling switching loss, allowing a much smaller transformer than a 50 Hz magnetic solution. The fundamental flyback energy transferred per switching cycle may be expressed as

where Lm is magnetizing inductance, IPK is the controlled primary peak current, fs is switching frequency and η is conversion efficiency. Modern designs recover transformer leakage energy, use zero-voltage or valley switching, and increasingly use GaN devices to reduce switching loss and magnetics volume. TI’s 65 W GaN QR reference design reports 94.32% efficiency at full load and 230 V AC, while its active-clamp 65 W designs report peak efficiency above 93% (Texas Instruments, 2020, 2023).

Figure 2. Representative 65 W USB-C adapter architecture. Adapted conceptually from published TI 65 W QR/active-clamp flyback reference designs; redrawn by the authors.

Figure 3. Conceptual conversion waveforms from 50 Hz mains through rectification and high-frequency switching to regulated 20 V VBUS. Switching trace is illustrative, not an OEM measurement.

4. USB-C Power Delivery as an Electrical Control Layer

USB-C adds a control plane between adapter and laptop. The source initially establishes a safe VBUS condition, communicates source capabilities over the Configuration Channel (CC), receives a sink request, validates cable capability and transitions to the requested power contract. For a 65 W full-power contract, the basic electrical identity is

The current is important because 3.25 A exceeds the 3 A rating of a standard USB-C cable. USB Type-C specifications require electronically marked 5 A-capable cables for current above 3 A when removable cabling is used. TI’s 2026 65 W GaN EVM likewise states that 3.25 A at 20 V requires an e-marker cable. Captive-cable adapters can control the cable implementation internally (USB-IF, 2019, 2024; Texas Instruments, 2026b).

Figure 4. Simplified USB-C PD negotiation sequence for a 65 W laptop load. Message names are condensed for power-system interpretation.

At the laptop connector, the same CC logic also supports dead-battery behavior: the platform must be able to recognize an attached source before the main processor is awake. This is why the PD controller, embedded controller and a subset of “always-on” rails belong to a special low-power domain that can operate before the full system is started.

5. Laptop Input Protection, Battery Charger and System Bus

After a valid contract is established, 20 V VBUS is still not connected directly to every motherboard circuit. Protection devices typically include ESD/TVS clamps, current sensing and back-to-back MOSFETs or an integrated eFuse/power-path device. Back-to-back FETs permit bidirectional blocking and controlled inrush. Their first-order conduction loss is

At 3.25 A, even 0.10 Ω total cable/contact loop resistance dissipates approximately 1.06 W and drops about 0.325 V. This explains why connector contamination, damaged cable conductors or poor solder joints can create charging instability without an obvious open circuit.

The charger stage in a modern notebook is commonly a narrow-voltage-DC (NVDC) buck-boost power path. Rather than treating the battery as a passive load, the controller simultaneously manages adapter current, battery current and system voltage. TI’s 2026 notebook reference design accepts USB-C PD or traditional adapters and supports 2-to-5-cell batteries using a dual-phase buck-boost topology (Texas Instruments, 2026a).

Figure 5. Representative protected input and NVDC battery power path for a modern laptop. The controller may buck, boost or buck-boost depending on adapter, battery and system-bus voltage.

For the Dell Latitude 5540 sample, the published 54 Wh battery is a 3-cell, 11.40 V pack. Its nominal ampere-hour energy equivalent is

If a 20 V bus is being bucked toward an 11.4 V pack, the ideal duty ratio is approximately D = VBAT/VBUS = 0.57. Real notebook charging is more complicated because pack voltage rises with state-of-charge, the charger may enter buck-boost operation, and a portion of adapter power is simultaneously consumed by the running computer.

6. Battery Charging Mathematics and Power Sharing

Lithium-ion charging is fundamentally a controlled-current and controlled-voltage process. During the constant-current (CC) phase the charger regulates battery current; once the pack approaches its charge-voltage limit, the control law transitions to constant-voltage (CV) operation and current tapers. Consequently, dividing battery Wh by adapter W produces only an energy scale, not a valid charge-time prediction.

As a transparent analytical example, if a 65 W adapter feeds a 98% efficient charger while the active laptop consumes 15 W, the remaining idealized current available to an 11.4 V battery is about 4.27 A before thermal, pack-current and firmware limits. This is an analysis example only; no sampled OEM is claimed to charge at that current.

Figure 6. Modelled CC-CV profile illustrating why actual charge time exceeds a simple Wh/W estimate.

7. Motherboard Power-System Architecture

The system bus cannot power the processor, RAM and I/O directly because these loads require different voltages, different noise limits and carefully controlled sequencing. The notebook therefore contains multiple synchronous buck converters, load switches, LDOs and power-management ICs. TI’s PC point-of-load reference material for Intel platforms explicitly identifies 3.3 V and 5 V rails, memory rails and low-voltage processor rails derived from battery or a 12 V bus (Texas Instruments, 2020a).

Figure 7. Representative modern laptop motherboard power tree. Exact rail names and voltages vary by CPU generation and OEM implementation.

7.1 Synchronous buck regulation

For an ideal synchronous buck regulator in continuous conduction mode, the steady-state conversion ratio is approximately

For example, a 1.0 V CPU rail from a 12 V pre-regulated bus has D ≈ 0.083. The low duty ratio and high current explain the use of low-resistance MOSFET power stages, short copper paths, low-ESR capacitors and multiphase interleaving. The inductor ripple is approximated by

7.2 Multiphase processor regulation

CPU and GPU core rails experience extremely fast load transitions. Dividing the load among N interleaved phases reduces current per phase, spreads heat and can partially cancel ripple. The total output current is the phase-current sum

while first-order conduction loss in the switching path remains governed by I²R. Current sharing therefore has both electrical and thermal value. Platform controllers also communicate requested core voltage through VID/SVID-like interfaces and coordinate PGOOD/enable sequencing with the embedded controller.

Figure 8. Representative two-phase CPU/GPU regulator and interleaved phase currents. Modern mobile processors may use more or fewer phases depending on power level and platform.

8. Comparative Results: HP, Dell and Lenovo

The most striking result of the three-case comparison is convergence. The three OEM ecosystems use different product names and battery capacities, yet the 65 W class aligns around the same electrical envelope: universal AC input, USB-C PD, and approximately 20 V at 3.25 A for maximum 65 W transfer. The brand-specific differentiation is therefore more visible in battery energy, port/adapter options, mechanical implementation and firmware policy than in the basic power-conversion physics.

Figure 9. Normalized energy comparison of the sampled platforms. The Wh/65 W line is a mathematical ratio, not an OEM battery-life or charge-time result.

9. Loss Budget and Thermal Interpretation

Every conversion stage trades efficiency against size, cost, switching frequency and transient response. The adapter incurs bridge, switching, transformer and secondary-rectifier loss; the connector/path incurs I²R loss; the NVDC charger incurs MOSFET and inductor loss; and the final point-of-load stages incur switching, conduction, magnetic and capacitor loss. A useful global expression is

The paper does not assign measured OEM efficiencies to internal stages because the selected manufacturer manuals do not publish them. Instead, Figure 10 combines one published reference-design datum—94.32% adapter efficiency at 230 V full load—with explicit analytical assumptions for later stages. The purpose is to show how small percentage losses multiply through the chain and become heat inside a compact chassis.

Figure 10. Cable/contact loss sensitivity and illustrative multi-stage power cascade. Only the adapter-efficiency point is a cited measured reference-design value; the later-stage efficiencies are transparent modelling assumptions.

10. Circuit-Level Diagnostic Implications

The end-to-end model also provides a disciplined troubleshooting sequence. A “no charge” complaint can originate before the laptop at the AC cord, adapter primary, USB-C cable or PD negotiation; at the laptop input in protection FETs or the charger controller; at the battery through a BMS/fuel-gauge fault; or deeper in the system at standby and processor rails. Measuring randomly at the CPU regulator before confirming 20 V VBUS and VSYS is therefore poor diagnostic practice.

Figure 11. Proposed diagnostic test-point ladder. Primary-side AC work is hazardous and should be undertaken only by trained personnel with appropriate isolation and measurement equipment.

A useful logic is: (1) verify mains and adapter output; (2) verify PD transition from safe attach voltage to the requested high-power rail; (3) check VBUS on both sides of input protection FETs; (4) confirm VSYS and charger status; (5) verify battery-pack voltage and communication; (6) check 3.3 V/5 V always-on rails; and only then (7) inspect CPU/GPU regulator enables, PGOOD and core rails. This sequence mirrors the actual dependency tree of the power system.

11. Discussion

The analysis shows why the familiar “19 V laptop charger” description is now incomplete. Older barrel-jack notebooks often received a fixed 19–20 V input; many modern platforms instead negotiate one of several adapter outputs and use a bidirectional battery power path that can accept a wide input range. The laptop power system is therefore a distributed control system in which the adapter, PD controller, charger, battery BMS, embedded controller and processor VR all participate in power-state decisions.

The three-brand comparison further indicates that standardization at the external interface does not eliminate internal engineering complexity. HP, Dell and Lenovo can all consume 65 W-class USB-C power while using different batteries, charging policies and board layouts. From a repair or teaching perspective, this is valuable: a technician can learn a common set of circuit principles—rectification, isolated flyback conversion, PD negotiation, protected power entry, buck-boost charging, synchronous buck conversion and multiphase regulation—and then map those principles onto brand-specific test points.

GaN technology is significant primarily because it improves the adapter’s switching-speed/size trade-off. HP publicly markets a 65 W GaN USB-C adapter, and semiconductor reference designs show how GaN devices enable compact QR/ACF conversion with efficiency in the 93–94% range. On the laptop side, however, silicon power MOSFETs remain widespread, with high-density dual-phase or multiphase buck-boost and buck stages emphasizing low conduction loss and thermal spreading (HP, 2026a; Texas Instruments, 2023, 2026a).

The principal limitation is the deliberate absence of proprietary OEM motherboard schematics and instrumented teardown measurements. That limitation is a strength for publication integrity: every OEM-specific value is source-traceable, while every generalized internal circuit is labelled as a representative model. A future experimental extension could instrument adapter efficiency, cable IR drop, battery current, VSYS, standby rails and VRM response on physical HP, Dell and Lenovo units using differential probes, USB-PD analyzers, current shunts, thermal imaging and synchronized logging.

12. Conclusion

This study presents a unified electrical analysis of the modern laptop power chain from a 230 V AC socket to the final processor rails. At the wall, 230 V RMS corresponds to approximately 325.3 V peak before high-frequency conversion. In the 65 W class, the adapter converts universal mains to a negotiated USB-C rail whose full-power operating point is typically 20 V/3.25 A. Inside the laptop, protection FETs and a PD sink controller feed an NVDC buck-boost charger that powers the system bus and battery; local synchronous regulators then generate 5 V, 3.3 V, memory/logic rails and sub-1.2 V multiphase CPU/GPU rails. HP ProBook 440 G10, Dell Latitude 5540 and Lenovo ThinkPad E14 Gen 5 converge on this external architecture while retaining different battery energies and implementation details. The end-to-end view clarifies both design and troubleshooting: power failures should be traced in dependency order from mains, adapter and PD contract through VSYS and battery management to always-on and processor rails. The result is a technically rigorous, brand-aware framework for laptop electronics education, servicing and future experimental research.

Declarations

Study type: Comparative original technical case-study and circuit-level analytical reconstruction based on public OEM specifications, standards and reference designs. Proprietary-data boundary: No confidential HP, Dell or Lenovo motherboard schematic is claimed. Brand-specific numerical values are taken from public manufacturer documentation; internal schematics are original authors’ representative engineering syntheses. Funding: No external funding declared. Competing interests: None declared. Ethics: Not applicable; the work involves no human or animal participants.

Author Contributions (CRediT-style)

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